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Saturday, July 18 • 7:00pm - 10:00pm
Neuromorphic VLSI realization of the Hippocampal formation

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Anu Aggarwal, Tianhua Xia

T4: Neuromorphic circuits are inspired by the organizing principles of biological neural circuits. These designs implement the computational neuroscience models of different parts of the brain in silicon. These silicon devices can perform actual work unlike the computer models. One of the main reasons for interest in this field is that the electrical and computer engineers wish to implement the superior processing powers of the brain to build machines like computers. For similar processing power, brain consumes much less power than a computer. Thus, scientists are interested in building power-efficient machines that are based on brain algorithms. Neuromorphic architectures often rely on collective computation in parallel networks. Adaptation, learning and memory are implemented locally within the individual computational elements as opposed to separation between memory and computations in conventional computers. As the Moore’s law has hit the limits, there is interest in brain-inspired computing to build small, and power efficient computing machines. Application domains of neuromorphic circuits include silicon retinas, cochleas for machine vision and audition, real-time emulations of networks of biological neurons, the lateral superior olive and hippocampal formation for the development of autonomous robotic systems and even replacement of brain neuronal functions with silicon neurons. This tutorial covers introduction to silicon Neuromorphic design with example of silicon implementation of the hippocampal formation.

Tutorial Website
Presentations/Lectures
link to presentation recording
https://illinois.zoom.us/rec/share/vP0qJZbL8DxLU43t-njVdqA-GaTAX6a8hnAZrqdcy0ZiLd-MVBLugPxnHPsHxO-_
  1. Brief background of Neuromorphic VLSI design, anatomy,  physiology (including lab experimental data) and computational neuroscience models of the Hippocampal formation
  2. Circuit design : Active and passive elements introduction
  3. VLSI design or silicon realization of the Hippocampal formation
Background readings (not required)
1. Analog VLSI and Neural systems by Carver Mead, 1989
2. J. O’Keefe, 1976, “Place units in the hippocampus of the freely moving rat”, Exp. Neurol. 51, 78-109.
3. J. S. Taube, R. U. Muller, J. B Ranck., Jr., 1990a, “Head direction cells recorded from the postsubiculum in freely moving rats. I. Description and quantitative analysis”, J Neurosci., 10, 420-435.
4. J. S. Taube, R. U. Muller, J. B Ranck., Jr., 1990b, “Head direction cells recorded from the post-subiculum in freely moving rats. II. Effects of environmental manipulations”, J Neurosci., 10, 436-447.
5. T. Hafting, M. Fyhn, S. Molden, M. B. Moser., E. I. Moser, August 2005, “Microstructure of a spatial map in the entorhinal cortex”, Nature, 436, 801-806.
6. B. L. McNaughton, F. P. Battaglia, O. Jensen, E. I. Moser & M. B. Moser, 2006, “Path integration and the neural basis of the 'cognitive map‘”, Nature Reviews Neuroscience, 7, 663-678.
7. H. Mhatre, A. Gorchetchnikov, and S. Grossberg, 2012, “Grid Cell Hexagonal Patterns Formed by Fast Self-Organized Learning within Entorhinal Cortex”, Hippocampus, 22:320–334.T. Madl, S. Franklin, K. Chen, D. Montaldi, R. Trappl, 2014, “Bayesian integration of information in hippocampal place cells”, PLOS one, 9(3), e89762.
8. Aggarwal, 2015, "Neuromorphic VLSI Bayesian integration synapse", the Electronics letters, 51(3):207-209.
9. A.Aggarwal, T. K. Horiuchi, 2015, “Neuromorphic VLSI second order synapse”, the Electronics letters, 51(4):319-321.
10. A.Aggarwal, 2015, “VLSI realization of neural velocity integrator and central pattern generator”, the Electronics letters, 51(18), DOI: 10.1049/el.2015.0544.
11. A.Aggarwal, 2016, “Neuromorphic VLSI realization of the Hippocampal Formation”, Neural Networks, May; 77:29-40. doi: 10.1016/j.neunet.2016.01.011. Epub 2016 Feb 4.

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Speakers
AA

Anu Aggarwal

Assistant Professor, Electrical and Computer Engineering University of Illinois Urbana Champaign, USA
Neuromorphic VLSI design



Saturday July 18, 2020 7:00pm - 10:00pm CEST
Link (T4)